{"id":9820,"date":"2026-07-13T02:54:04","date_gmt":"2026-07-13T02:54:04","guid":{"rendered":"https:\/\/dz-rf.com\/?post_type=product&p=9820"},"modified":"2026-07-13T02:55:08","modified_gmt":"2026-07-13T02:55:08","slug":"limesdr-mini-2-4","status":"publish","type":"product","link":"https:\/\/dz-rf.com\/pt\/produto\/limesdr-mini-2-4\/","title":{"rendered":"LimeSDR Mini V2.4"},"content":{"rendered":"

The LimeSDR Mini v2 is a compact and cost-effective software-defined radio (SDR) platform engineered for advanced wireless communication research, prototyping, and development. The device is based on the Lime Microsystems LMS7002M RF transceiver, supporting a frequency range of 10 MHz to 2.6 GHz, full-duplex operation, and instantaneous bandwidths of up to 30.72 MHz.<\/p>\n

The digital processing architecture incorporates a Lattice ECP5 FPGA, which performs high-speed data handling, digital signal processing, and interface management between the RF front end and the host system. The FPGA enables flexible hardware-level customization, allowing implementation of user-defined processing pipelines and acceleration of computationally intensive tasks.<\/p>\n

Connectivity is provided through a USB 3.0 interface, ensuring reliable high-throughput data transfer to a host computer. The platform is supported by established open-source software frameworks, including GNU Radio,\u00a0WSDR.IO<\/a>\u00a0and SoapySDR, facilitating integration into diverse development environments.<\/p>\n

Specifications<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n
Parameter<\/th>\nValue<\/th>\nNotes<\/th>\n<\/tr>\n<\/thead>\n
Configuration<\/th>\nSISO (1T1R)<\/td>\nFull duplex<\/td>\n<\/tr>\n
Frequency Range<\/th>\n10 MHz \u2013 2.6 GHz<\/td>\nNon-continuous coverage<\/td>\n<\/tr>\n
Bandwidth<\/th>\nup to 30.72 MHz<\/td>\nSoftware configurable<\/td>\n<\/tr>\n
Sample depth<\/th>\n12 bit<\/td>\n<\/td>\n<\/tr>\n
Sample rate<\/th>\n30.72 MSPS<\/td>\n<\/td>\n<\/tr>\n
Max. Safe Rx Input Power<\/th>\n10 dBm<\/td>\nAbsolute maximum<\/td>\n<\/tr>\n
Rx Gain Range<\/th>\n89 dB<\/td>\nLNA + TIA + PGA combined<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Digital Interface<\/h3>\n

USB 3.0 Type-A plug connector.<\/p>\n

Power Supply<\/h3>\n
\n\n\n\n\n\n\n
Parameter<\/th>\nValue<\/th>\nNotes<\/th>\n<\/tr>\n<\/thead>\n
Input Voltage<\/th>\n5 V DC<\/td>\nVia USB Type-A connector<\/td>\n<\/tr>\n
Maximum Power<\/th>\n4.5 W<\/td>\nUSB 3.0 power limit<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Features<\/h2>\n
\n

Devices<\/h3>\n
    \n
  • RF transceiver: Lime Microsystems LMS7002M<\/li>\n
  • FPGA: board is designed for Lattice ECP5 family LFE5U-25F\/LFE5U-45F\/LFE5U-85F FPGAs in 285-ball csfBGA package. By default board is assembled with LFE5U-45F-MG285 FPGA. Lattice ECP5 LFE5U-45F features:\n
      \n
    • 285-pin csfBGA package (10 x 10 mm, 0.5 mm)<\/li>\n
    • 44 K LUTs logic capacity<\/li>\n
    • 108 sysMEM Blocks (18 Kb)<\/li>\n
    • 1944 Kb Embedded Memory<\/li>\n
    • 351 Kb distributed RAM<\/li>\n
    • 72x 18×18-bit multipliers<\/li>\n
    • 4x PLLs and 4x DLLs<\/li>\n
    • 118 IOs<\/li>\n
    • FPGA configuration via JTAG<\/li>\n<\/ul>\n<\/li>\n
    • USB 3.0 controller: FTDI FT601<\/li>\n
    • Temperature sensor: LM75<\/li>\n<\/ul>\n<\/section>\n
      \n

      Clock system<\/h3>\n
        \n
      • 40.00MHz on board VCTCXO<\/li>\n
      • VCTCXO can be tuned by onboard DAC<\/li>\n
      • Reference clock input and output connectors (U.FL)<\/li>\n<\/ul>\n<\/section>\n
        \n

        Memory<\/h3>\n
          \n
        • EEPROM Memory: 2x 128Kb EEPROMs for LMS MCU firmware and FPGA data (optional)<\/li>\n
        • FLASH Memory: 128Mb Flash memory for FPGA configuration<\/li>\n<\/ul>\n<\/section>\n
          \n

          General user inputs\/outputs:<\/h3>\n
            \n
          • 3x Dual colour (RG) LEDs<\/li>\n
          • 8x + 2x FPGA GPIO pinheaders (3.3V) (optional)<\/li>\n<\/ul>\n<\/section>\n
            \n

            Connections<\/h3>\n
              \n
            • USB 3.0 (type A) plug<\/li>\n
            • Coaxial RF (SMA female) connectors<\/li>\n
            • FPGA GPIO headers (unpopulated)<\/li>\n
            • FPGA JTAG connector (unpopulated)<\/li>\n
            • FAN (5V default or 3.3V) connector<\/li>\n<\/ul>\n<\/section>\n<\/div>","protected":false},"excerpt":{"rendered":"

              The LimeSDR Mini v2 is a compact and cost-effective software-defined radio (SDR) platform engineered for advanced wireless communication research, prototyping, and development. The device is based on the Lime Microsystems…<\/p>","protected":false},"featured_media":9826,"comment_status":"open","ping_status":"closed","template":"","meta":[],"product_brand":[],"product_cat":[15],"product_tag":[],"class_list":["post-9820","product","type-product","status-publish","has-post-thumbnail","product_cat-others","first","instock","shipping-taxable","purchasable","product-type-simple"],"_links":{"self":[{"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/product\/9820","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/types\/product"}],"replies":[{"embeddable":true,"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/comments?post=9820"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/media\/9826"}],"wp:attachment":[{"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/media?parent=9820"}],"wp:term":[{"taxonomy":"product_brand","embeddable":true,"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/product_brand?post=9820"},{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/product_cat?post=9820"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/dz-rf.com\/pt\/wp-json\/wp\/v2\/product_tag?post=9820"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}